Caple C702G Manual de Serviço descarregar pdf (Página 149)

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2) DC Control Circuit

CPU (IC801) controls three DAC ICs (IC532, IC751, IC711) through I

C BUS. Its analog outputs control DAC

output so that the analog voltage corresponds to the DC control data from CPU. IC802 is an EEPROM which

stores the DC control data for preset graphics standard timings.

Table 1 Summary of DAC control (IC532 on DEF PWB: CS0=CS1=CS2=0)

PORT NAME Summary

A01 COR_LT Corner Landing Adjustment (LEFT TOP)

A02 ROT Raster Rotation Adjustment

A03 EMF Earth Magnetic Field Correction

A04 H_LIN Horizontal Linearity Adjustment

A05 FV_L2 Vertical Filter Switch 2

A06 FV_L3 Vertical Filter Switch 3

A07 FV_L1 Vertical Filter Switch 1

A08 HS Horizontal Size Adjustment

A09 HSM Horizontal Maximum Size Adjustment

A10 COR_RB Corner Landing Adjustment (RIGHT BOTTOM)

A11 COR_RT Corner Landing Adjustment (RIGHT TOP)

A12 COR_LB Corner Landing Adjustment (LEFT BOTTOM)

Table 2 Summary of DAC control (IC751 on VIDEO PWB: CS0=1 CS1=CS2=0)

PORT NAME Summary

A01 - Not in use

A02 SUB_BIAS CRT Cut off adjustment

A03 G_BIAS CRT Cut off adjustment (Green)

A04 G_BRT Brightness tracking adjustment (Green)

A05 B_BRT Brightness tracking adjustment (Blue)

A06 B_BIAS CRT Cut off adjustment (Blue)

A07 R_BIAS CRT Cut off adjustment (Red)

A08 R_BRT Brightness tracking adjustment (Red)

Table 3 Summary of DAC control (IC711 on VIDEO PWB)

PORT NAME Summary

D/A OUT1 SHARP1 Picture sharpness control 1

D/A OUT2 SHARP2 Picture sharpness control 2 (Only Aver.)

D/A OUT3 SHARP3 Picture sharpness control 3 (Only Aver.)

D/A OUT4 GAIN_ADJ Video gain adjustment

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Caple C702G Manual de Serviço Página 149